commit | 078bb2ef451a76772afc8fcf87bcad3f8be653e4 | [log] [tgz] |
---|---|---|
author | Vladimir Khlyunev <vkhlyunev@mirantis.com> | Wed Sep 15 14:16:47 2021 +0400 |
committer | Vladimir Khlyunev <vkhlyunev@mirantis.com> | Wed Sep 15 10:17:57 2021 +0000 |
tree | 2c6b06444a199e34d5a90be1e4c0ed706921c398 | |
parent | edb98f92e906c0a4bb6c9ca0bd72cb32e7b41dd7 [diff] [blame] |
Fix typo for cpu_mode pillar PROD-36510 Change-Id: I6ddc9d3592a0446ba5e51abaea12be718f22a642
diff --git a/salt/control/cluster/rsyslog_single.yml b/salt/control/cluster/rsyslog_single.yml index a5ff589..d013402 100644 --- a/salt/control/cluster/rsyslog_single.yml +++ b/salt/control/cluster/rsyslog_single.yml
@@ -29,4 +29,4 @@ backend: ${_param:rsyslog_backend_image} size: infra.rsyslog cloud_init: ${_param:salt_control_cluster_node_cloud_init_infra_rsyslog} - cpu_mode: ${_param:salt_control_cluster_qemu_cpu_model} + cpu_mode: ${_param:salt_control_cluster_qemu_cpu_mode}